mirror of
https://github.com/dolphin-emu/dolphin
synced 2024-11-04 20:43:44 -05:00
56 lines
1.1 KiB
Plaintext
56 lines
1.1 KiB
Plaintext
; This test needs to manually specify IRQs
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jmp irq0
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jmp irq1
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jmp irq2
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jmp irq3
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jmp irq4
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jmp accov_irq
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jmp irq6
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jmp irq7
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incdir "tests"
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include "dsp_base_noirq.inc"
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test_main:
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; Use the accelerator to generate an IRQ by setting the start and end address to 0
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; This will result in an interrupt on every read
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SI @0xffda, #0 ; pred_scale
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SI @0xffdb, #0 ; yn1
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SI @0xffdc, #0 ; yn2
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SI @0xffd1, #0 ; SampleFormat
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SI @ACSAH, #0
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SI @ACCAH, #0
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SI @ACSAL, #0
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SI @ACCAL, #0
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SI @ACEAH, #0
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SI @ACEAL, #0
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LRI $AX1.H, #0x0000
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LRS $AX0.L, @ARAM ; Trigger interrupt
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CALL send_back
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LRI $AX1.H, #0x0001
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LRS $AX0.L, @ARAM ; Trigger interrupt
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CALL send_back
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LRI $AX1.H, #0x0000
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LRS $AX0.L, @ARAM ; Trigger interrupt
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CALL send_back
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jmp end_of_test
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accov_irq:
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; Restore registers, otherwise no new interrupt will be generated
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SI @0xffda, #0 ; pred_scale
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SI @0xffdb, #0 ; yn1
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SI @0xffdc, #0 ; yn2
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TSTAXH $AX1.H
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LRI $AX1.L, #0x1111
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cw 0x02f4 ; RTINZ if it exists
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LRI $AX1.L, #0x2222
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cw 0x02f5 ; RTIZ if it exists
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LRI $AX1.L, #0x3333
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RTI
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